[Verilog] Data type

Variable

0	logic ‘0’ or a false
0	logic ‘1’ or a true
x	don’t care or unknown value
z	high-impedance

 

Number representation

`b	binary
`d	decimal
`h	hexadecimal

Data type

wire	Net type
reg	Register type
integer	Signed decimal form, 32bits
parameter	Constant value
localparam	Constant value
`define	Constant value

 

Array